p16f877a.h

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00001 #ifndef PICTYPE
00002 #define PICTYPE P16F877A
00003   
00004 #ifdef _ASSEMBLER_
00005 #define _PD
00006 #else
00007 #define _PD(x) (*(volatile unsigned char *) (x))
00008 #endif
00009 
00010 
00011 // 0x000 - 0x07F
00012 
00013 #define INDF    _PD(0x000)
00014 #define INDFdir     0x000
00015 #define TMR0    _PD(0x001)
00016 #define TMR0dir     0x001
00017 #define PCL     _PD(0x002)
00018 #define PCLdir      0x002
00019 #define STATUS  _PD(0x003)
00020 #define STATUSdir   0x003
00021 #define FSR     _PD(0x004)
00022 #define FSRdir      0x004
00023 #define PORTA   _PD(0x005)
00024 #define PORTAdir    0x005
00025 #define PORTB   _PD(0x006)
00026 #define PORTBdir    0x006
00027 #define PORTC   _PD(0x007)
00028 #define PORTCdir    0x007
00029 #define PORTD   _PD(0x008)
00030 #define PORTDdir    0x008
00031 #define PORTE   _PD(0x009)
00032 #define PORTEdir    0x009
00033 #define PCLATH  _PD(0x00A)
00034 #define PCLATHdir   0x00A
00035 #define INTCON  _PD(0x00B)
00036 #define INTCONdir   0x00B
00037 #define PIR1    _PD(0x00C)
00038 #define PIR1dir     0x00C
00039 #define PIR2    _PD(0x00D)
00040 #define PIR2dir     0x00D
00041 #define TMR1L   _PD(0x00E)
00042 #define TMR1Ldir    0x00E
00043 #define TMR1H   _PD(0x00F)
00044 #define TMR1Hdir    0x00F
00045 #define T1CON   _PD(0x010)
00046 #define T1CONdir    0x010
00047 #define TMR2    _PD(0x011)
00048 #define TMR2dir     0x011
00049 #define T2CON   _PD(0x012)
00050 #define T2CONdir    0x012
00051 #define SSPBUF  _PD(0x013)
00052 #define SSPBUFdir   0x013
00053 #define SSPCON  _PD(0x014)
00054 #define SSPCONdir   0x014
00055 #define CCPR1L  _PD(0x015)
00056 #define CCPR1Ldir   0x015
00057 #define CCPR1H  _PD(0x016)
00058 #define CCPR1Hdir   0x016
00059 #define CCP1CON _PD(0x017)
00060 #define CCP1CONdir  0x017
00061 #define RCSTA   _PD(0x018)
00062 #define RCSTAdir    0x018
00063 #define TXREG   _PD(0x019)
00064 #define TXREGdir    0x019
00065 #define RCREG   _PD(0x01A)
00066 #define RCREGdir    0x01A
00067 #define CCPR2L  _PD(0x01B)
00068 #define CCPR2Ldir   0x01B
00069 #define CCPR2H  _PD(0x01C)
00070 #define CCPR2Hdir   0x01C
00071 #define CCP2CON _PD(0x01D)
00072 #define CCP2CONdir  0x01D
00073 #define ADRESH  _PD(0x01E)
00074 #define ADRESHdir   0x01E
00075 #define ADCON0  _PD(0x01F)
00076 #define ADCON0dir   0x01F
00077 
00078 
00079 // 0x080 - 0x0FF
00080 
00081 #define OPTION_REG _PD(0x081)
00082 #define OPTION_REGdir  0x081
00083 #define TRISA      _PD(0x085)
00084 #define TRISAdir       0x085
00085 #define TRISB      _PD(0x086)
00086 #define TRISBdir       0x086
00087 #define TRISC      _PD(0x087)
00088 #define TRISCdir       0x087
00089 #define TRISD      _PD(0x088)
00090 #define TRISDdir       0x088
00091 #define TRISE      _PD(0x089)
00092 #define TRISEdir       0x089
00093 #define PIE1       _PD(0x08C)
00094 #define PIE1dir        0x08C
00095 #define PIE2       _PD(0x08D)
00096 #define PIE2dir        0x08D
00097 #define PCON       _PD(0x08E)
00098 #define PCONdir        0x08E
00099 #define SSPCON2    _PD(0x091)
00100 #define SSPCON2dir     0x091
00101 #define PR2        _PD(0x092)
00102 #define PR2dir         0x092
00103 #define SSPADD     _PD(0x093)
00104 #define SSPADDdir      0x093
00105 #define SSPSTAT    _PD(0x094)
00106 #define SSPSTATdir     0x094
00107 #define TXSTA      _PD(0x098)
00108 #define TXSTAdir       0x098
00109 #define SPBRG      _PD(0x099)
00110 #define SPBRGdir       0x099
00111 #define CMCON      _PD(0x09C)
00112 #define CMCONdir       0x09C
00113 #define CVRCON     _PD(0x09D)
00114 #define CVRCONdir      0x09D
00115 #define ADRESL     _PD(0x09E)
00116 #define ADRESLdir      0x09E
00117 #define ADCON1     _PD(0x09F)
00118 #define ADCON1dir      0x09F
00119 
00120 
00121 // 0x100 - 0x17F
00122 
00123 #define EEDATA     _PD(0x10C)
00124 #define EEDATAdir      0x10C
00125 #define EEADR      _PD(0x10D)
00126 #define EEADRdir       0x10D
00127 #define EEDATH     _PD(0x10E)
00128 #define EEDATHdir      0x10E
00129 #define EEADRH     _PD(0x10F)
00130 #define EEADRHdir      0x10F
00131 
00132 
00133 // 0x180 - 0x1FF
00134 
00135 #define EECON1     _PD(0x18C)
00136 #define EECON1dir      0x18C
00137 #define EECON2     _PD(0x18D)
00138 #define EECON2dir      0x18D
00139 
00140 
00142 //            Definiendo BITS          //
00144 
00145 // Bits 0x000 - 0x07F
00146 
00147 //STATUS
00148 typedef struct
00149 { 
00150         unsigned int C  :1;
00151         unsigned int DC :1;
00152         unsigned int Z  :1;
00153         unsigned int PD :1;
00154         unsigned int TO :1;
00155         unsigned int RP0:1;
00156         unsigned int RP1:1;
00157         unsigned int IRP:1;
00158 } OBJ_STATUSbits;
00159 #define STATUSbits      (*(volatile OBJ_STATUSbits*)(STATUSdir))
00160 
00161 
00162 //PORTA
00163 typedef struct
00164 { 
00165         unsigned int RA0:1;
00166         unsigned int RA1:1;
00167         unsigned int RA2:1;
00168         unsigned int RA3:1;
00169         unsigned int RA4:1;
00170         unsigned int RA5:1;
00171         unsigned int RA6:1;
00172         unsigned int RA7:1;
00173 } OBJ_PORTAbits;
00174 #define PORTAbits       (*(volatile OBJ_PORTAbits*)(PORTAdir))
00175 
00176 //PORTB
00177 typedef struct
00178 { 
00179         unsigned int RB0:1;
00180         unsigned int RB1:1;
00181         unsigned int RB2:1;
00182         unsigned int RB3:1;
00183         unsigned int RB4:1;
00184         unsigned int RB5:1;
00185         unsigned int RB6:1;
00186         unsigned int RB7:1;
00187 } OBJ_PORTBbits;
00188 #define PORTBbits       (*(volatile OBJ_PORTBbits*)(PORTBdir))
00189 
00190 //PORTC
00191 typedef struct
00192 { 
00193         unsigned int RC0:1;
00194         unsigned int RC1:1;
00195         unsigned int RC2:1;
00196         unsigned int RC3:1;
00197         unsigned int RC4:1;
00198         unsigned int RC5:1;
00199         unsigned int RC6:1;
00200         unsigned int RC7:1;
00201 } OBJ_PORTCbits;
00202 #define PORTCbits       (*(volatile OBJ_PORTCbits*)(PORTCdir))
00203 
00204 //PORTD
00205 typedef struct
00206 { 
00207         unsigned int RD0:1;
00208         unsigned int RD1:1;
00209         unsigned int RD2:1;
00210         unsigned int RD3:1;
00211         unsigned int RD4:1;
00212         unsigned int RD5:1;
00213         unsigned int RD6:1;
00214         unsigned int RD7:1;
00215 } OBJ_PORTDbits;
00216 #define PORTDbits       (*(volatile OBJ_PORTDbits*)(PORTDdir))
00217 
00218 //PORTE
00219 typedef struct
00220 { 
00221         unsigned int RE0:1;
00222         unsigned int RE1:1;
00223         unsigned int RE2:1;
00224         unsigned int RE3:1;
00225         unsigned int RE4:1;
00226         unsigned int RE5:1;
00227         unsigned int RE6:1;
00228         unsigned int RE7:1;
00229 } OBJ_PORTEbits;
00230 #define PORTEbits       (*(volatile OBJ_PORTEbits*)(PORTEdir))
00231 
00232 //INTCON
00233 typedef struct
00234 { 
00235         unsigned int RBIF:1;
00236         unsigned int INTF:1;
00237         unsigned int T0IF:1;
00238         unsigned int RBIE:1;
00239         unsigned int INTE:1;
00240         unsigned int T0IE:1;
00241         unsigned int PEIE:1;
00242         unsigned int GIE :1;
00243 } OBJ_INTCONbits;
00244 #define INTCONbits      (*(volatile OBJ_INTCONbits*)(INTCONdir))
00245 
00246 
00247 //PIR1
00248 typedef struct
00249 { 
00250         unsigned int TMR1IF:1;
00251         unsigned int TMR2IF:1;
00252         unsigned int CCP1IF:1;
00253         unsigned int SSPIF :1;
00254         unsigned int TXIF  :1;
00255         unsigned int RCIF  :1;
00256         unsigned int ADIF  :1;
00257         unsigned int PSPIF :1;
00258 } OBJ_PIR1bits;
00259 #define PIR1bits        (*(volatile OBJ_PIR1bits*)(PIR1dir))
00260 
00261 
00262 //PIR2                                          
00263 typedef struct
00264 { 
00265         unsigned int CCP2IF:1;
00266         unsigned int BIT1  :1;
00267         unsigned int BIT2  :1;
00268         unsigned int BCLIF :1;
00269         unsigned int EEIF  :1;
00270         unsigned int BIT5  :1;
00271         unsigned int CMIF  :1;
00272         unsigned int BIT7  :1;
00273 } OBJ_PIR2bits;
00274 #define PIR2bits        (*(volatile OBJ_PIR2bits*)(PIR2dir))
00275 
00276 //T1CON                                         
00277 typedef struct 
00278 {
00279         unsigned int TMR1ON :1;
00280         unsigned int TMR1CS :1;
00281         unsigned int T1SYNC :1;
00282         unsigned int T1OSCEN:1;
00283         unsigned int T1CKPS0:1;
00284         unsigned int T1CKPS1:1;
00285         unsigned int BIT6   :1;
00286         unsigned int BIT7   :1;
00287 } OBJ_T1CONbits;
00288 #define T1CONbits       (*(volatile OBJ_T1CONbits*)(T1CONdir))
00289 
00290 
00291 //T2CON
00292 typedef struct
00293 { 
00294         unsigned int T2CKPS0:1;
00295         unsigned int T2CKPS1:1;
00296         unsigned int TMR2ON :1;
00297         unsigned int TOUTPS0:1;
00298         unsigned int TOUTPS1:1;
00299         unsigned int TOUTPS2:1;
00300         unsigned int TOUTPS3:1;
00301         unsigned int BIT7   :1;
00302 } OBJ_T2CONbits;
00303 #define T2CONbits       (*(volatile OBJ_T2CONbits*)(T2CONdir))
00304 
00305 
00306 // SSPCON 
00307 typedef struct 
00308 {
00309         unsigned int SSPM0:1;
00310         unsigned int SSPM1:1;
00311         unsigned int SSPM2:1;
00312         unsigned int SSPM3:1;
00313         unsigned int CKP:1;
00314         unsigned int SSPEN:1;
00315         unsigned int SSPOV:1;
00316         unsigned int WCOL:1;
00317 } OBJ_SSPCONbits;
00318 #define SSPCONbits      (*(volatile OBJ_SSPCONbits*)(SSPCONdir))
00319 
00320 
00321 //CCP1CON
00322 typedef struct
00323 { 
00324         unsigned int CCP1M0:1;
00325         unsigned int CCP1M1:1;
00326         unsigned int CCP1M2:1;
00327         unsigned int CCP1M3:1;
00328         unsigned int CCP1Y :1;
00329         unsigned int CCP1X :1;
00330         unsigned int BIT6  :1;
00331         unsigned int BIT7  :1;
00332 } OBJ_CCP1CONbits;
00333 #define CCP1CONbits     (*(volatile OBJ_CCP1CONbits*)(CCP1CONdir))
00334 
00335 
00336 //RCSTA
00337 typedef struct
00338 { 
00339         unsigned int RX9D :1;
00340         unsigned int OERR :1;
00341         unsigned int FERR :1;
00342         unsigned int ADDEN:1;
00343         unsigned int CREN :1;
00344         unsigned int SREN :1;
00345         unsigned int RX9  :1;
00346         unsigned int SPEN :1;
00347 } OBJ_RCSTAbits;
00348 #define RCSTAbits       (*(volatile OBJ_RCSTAbits*)(RCSTAdir))
00349 
00350 
00351 //CCP2CON
00352 typedef struct
00353 { 
00354         unsigned int CCP2M0:1;
00355         unsigned int CCP2M1:1;
00356         unsigned int CCP2M2:1;
00357         unsigned int CCP2M3:1;
00358         unsigned int CCP2Y :1;
00359         unsigned int CCP2X :1;
00360         unsigned int BIT6  :1;
00361         unsigned int BIT7  :1;
00362 } OBJ_CCP2CONbits;
00363 #define CCP2CONbits     (*(volatile OBJ_CCP2CONbits*)(CCP2CONdir))
00364 
00365 
00366 //ADCON0
00367 typedef struct
00368 { 
00369         unsigned int ADON :1;
00370         unsigned int BIT1 :1;
00371         unsigned int GO   :1;
00372         unsigned int CHS0 :1;
00373         unsigned int CHS1 :1;
00374         unsigned int CHS2 :1;
00375         unsigned int ADCS0:1;
00376         unsigned int ADCS1:1;
00377 } OBJ_ADCON0bits;
00378 #define ADCON0bits      (*(volatile OBJ_ADCON0bits*)(ADCON0dir))
00379 
00380 
00381 // Bits 0x080 - 0x0FF
00382 
00383 //OPTION_REG
00384 typedef struct
00385 { 
00386         unsigned int PS0   :1;
00387         unsigned int PS1   :1;
00388         unsigned int PS2   :1;
00389         unsigned int PSA   :1;
00390         unsigned int T0SE  :1;
00391         unsigned int T0CS  :1;
00392         unsigned int INTEDG:1;
00393         unsigned int RBPU  :1;
00394 } OBJ_OPTION_REGbits;
00395 #define OPTION_REGbits  (*(volatile OBJ_OPTION_REGbits*)(OPTION_REGdir))
00396 
00397 
00398 //TRISA
00399 typedef struct
00400 { 
00401         unsigned int TRISA0:1;
00402         unsigned int TRISA1:1;
00403         unsigned int TRISA2:1;
00404         unsigned int TRISA3:1;
00405         unsigned int TRISA4:1;
00406         unsigned int TRISA5:1;
00407         unsigned int TRISA6:1;
00408         unsigned int TRISA7:1;
00409 } OBJ_TRISAbits;
00410 #define TRISAbits       (*(volatile OBJ_TRISAbits*)(TRISAdir))
00411 
00412 
00413 //TRISB
00414 typedef struct
00415 { 
00416         unsigned int TRISB0:1;
00417         unsigned int TRISB1:1;
00418         unsigned int TRISB2:1;
00419         unsigned int TRISB3:1;
00420         unsigned int TRISB4:1;
00421         unsigned int TRISB5:1;
00422         unsigned int TRISB6:1;
00423         unsigned int TRISB7:1;
00424 } OBJ_TRISBbits;
00425 #define TRISBbits       (*(volatile OBJ_TRISBbits*)(TRISBdir))
00426 
00427 
00428 //TRISC
00429 typedef struct
00430 { 
00431         unsigned int TRISC0:1;
00432         unsigned int TRISC1:1;
00433         unsigned int TRISC2:1;
00434         unsigned int TRISC3:1;
00435         unsigned int TRISC4:1;
00436         unsigned int TRISC5:1;
00437         unsigned int TRISC6:1;
00438         unsigned int TRISC7:1;
00439 } OBJ_TRISCbits;
00440 #define TRISCbits       (*(volatile OBJ_TRISCbits*)(TRISCdir))
00441 
00442 
00443 //TRISD
00444 typedef struct
00445 { 
00446         unsigned int TRISD0:1;
00447         unsigned int TRISD1:1;
00448         unsigned int TRISD2:1;
00449         unsigned int TRISD3:1;
00450         unsigned int TRISD4:1;
00451         unsigned int TRISD5:1;
00452         unsigned int TRISD6:1;
00453         unsigned int TRISD7:1;
00454 } OBJ_TRISDbits;
00455 #define TRISDbits       (*(volatile OBJ_TRISDbits*)(TRISDdir))
00456 
00457 
00458 //TRISE
00459 typedef struct
00460 { 
00461         unsigned int TRISE0:1;
00462         unsigned int TRISE1:1;
00463         unsigned int TRISE2:1;
00464         unsigned int TRISE3:1;
00465         unsigned int TRISE4:1;
00466         unsigned int TRISE5:1;
00467         unsigned int TRISE6:1;
00468         unsigned int TRISE7:1;
00469 } OBJ_TRISEbits;
00470 #define TRISEbits       (*(volatile OBJ_TRISEbits*)(TRISEdir))
00471 
00472 
00473 //PIE1
00474 typedef struct
00475 { 
00476         unsigned int TMR1IE:1;
00477         unsigned int TMR2IE:1;
00478         unsigned int CCP1IE:1;
00479         unsigned int SSPIE :1;
00480         unsigned int TXIE  :1;
00481         unsigned int RCIE  :1;
00482         unsigned int ADIE  :1;
00483         unsigned int PSPIE :1;
00484 } OBJ_PIE1bits;
00485 #define PIE1bits        (*(volatile OBJ_PIE1bits*)(PIE1dir))
00486 
00487 
00488 // PIE2 
00489 typedef struct 
00490 {
00491         unsigned int CCP2IE:1;
00492         unsigned int BIT1  :1;
00493         unsigned int BIT2  :1;
00494         unsigned int BCLIE :1;
00495         unsigned int EEIE  :1;
00496         unsigned int BIT5  :1;
00497         unsigned int BIT6  :1;
00498         unsigned int BIT7  :1;
00499 } OBJ_PIE2bits;
00500 #define PIE2bits        (*(volatile OBJ_PIE2bits*)(PIE2dir))
00501 
00502 //PCON                          
00503 typedef struct 
00504 {
00505         unsigned int BOR :1;
00506         unsigned int POR :1;
00507         unsigned int BIT2:1;
00508         unsigned int BIT3:1;
00509         unsigned int BIT4:1;
00510         unsigned int BIT5:1;
00511         unsigned int BIT6:1;
00512         unsigned int BIT7:1;
00513 } OBJ_PCONbits;
00514 #define PCONbits        (*(volatile OBJ_PCONbits*)(PCONdir))
00515 
00516 
00517 //SSPCON2
00518 typedef struct
00519 { 
00520         unsigned int SEN    :1;
00521         unsigned int RSEN   :1;
00522         unsigned int PEN    :1;
00523         unsigned int RCEN   :1;
00524         unsigned int ACKEN  :1;
00525         unsigned int ACKDT  :1;
00526         unsigned int ACKSTAT:1;
00527         unsigned int GCEN   :1;
00528 } OBJ_SSPCON2bits;
00529 #define SSPCON2bits     (*(volatile OBJ_SSPCON2bits*)(SSPCON2dir))
00530 
00531 
00532 //SSPSTAT
00533 typedef struct
00534 { 
00535         unsigned int BF :1;
00536         unsigned int UA :1;
00537         unsigned int RW :1;
00538         unsigned int S  :1;
00539         unsigned int P  :1;
00540         unsigned int DA :1;
00541         unsigned int CKE:1;
00542         unsigned int SMP:1;
00543 } OBJ_SSPSTATbits;
00544 #define SSPSTATbits     (*(volatile OBJ_SSPSTATbits*)(SSPSTATdir))
00545 
00546 
00547 //TXSTA
00548 typedef struct
00549 { 
00550         unsigned int TX9D:1;
00551         unsigned int TRMT:1;
00552         unsigned int BRGH:1;
00553         unsigned int BIT3:1;
00554         unsigned int SYNC:1;
00555         unsigned int TXEN:1;
00556         unsigned int TX9 :1;
00557         unsigned int CSRC:1;
00558 } OBJ_TXSTAbits;
00559 #define TXSTAbits       (*(volatile OBJ_TXSTAbits*)(TXSTAdir))
00560 
00561 // CMCON 
00562 typedef struct 
00563 {
00564         unsigned int CM0  :1;
00565         unsigned int CM1  :1;
00566         unsigned int CM2  :1;
00567         unsigned int CIS  :1;
00568         unsigned int C1INV:1;
00569         unsigned int C2INV:1;
00570         unsigned int C1OUT:1;
00571         unsigned int C2OUT:1;
00572 } OBJ_CMCONbits;
00573 #define CMCONbits       (*(volatile OBJ_CMCONbits*)(CMCONdir))
00574 
00575 // CVRCON 
00576 typedef struct 
00577 {
00578         unsigned int CVR0 :1;
00579         unsigned int CVR1 :1;
00580         unsigned int CVR2 :1;
00581         unsigned int CVR3 :1;
00582         unsigned int BIT4 :1;
00583         unsigned int CVRR :1;
00584         unsigned int CVROE:1;
00585         unsigned int CVREN:1;
00586 } OBJ_CVRCONbits;
00587 #define CVRCONbits      (*(volatile OBJ_CVRCONbits*)(CVRCONdir))
00588 
00589 //ADCON1
00590 typedef struct
00591 { 
00592         unsigned int PCFG0:1;
00593         unsigned int PCFG1:1;
00594         unsigned int PCFG2:1;
00595         unsigned int PCFG3:1;
00596         unsigned int BIT4 :1;
00597         unsigned int BIT5 :1;
00598         unsigned int ADCS2:1;
00599         unsigned int ADFM :1;
00600 } OBJ_ADCON1bits;
00601 #define ADCON1bits      (*(volatile OBJ_ADCON1bits*)(ADCON1dir))
00602 
00603 
00604 // Bits 0x180 - 0x1FF
00605 
00606 //EECON1
00607 typedef struct
00608 { 
00609         unsigned int RD   :1;
00610         unsigned int WR   :1;
00611         unsigned int WREN :1;
00612         unsigned int WRERR:1;
00613         unsigned int BIT4 :1;
00614         unsigned int BIT5 :1;
00615         unsigned int BIT6 :1;
00616         unsigned int EEPGD:1;
00617 } OBJ_EECON1bits;
00618 #define EECON1bits      (*(volatile OBJ_EECON1bits*)(EECON1dir))
00619 
00620 
00621 // Configuration word
00622 /*
00623 ;//FLASH PROTECT READ
00624 #define CP_ALL          0x0FCF
00625 #define CP_HALF         0x1FDF
00626 #define CP_UPPER        0x2FEF
00627 #define CP_OFF          0x3FFF
00628 */
00629 
00630 /*
00631 ;//DEBUG
00632 #define DEBUG_DIS 0x3FFF
00633 #define DEBUG_EN  0x37FF
00634 */
00635 
00636 /*
00637 ;//FLASH PROTECT WRITE
00638 #define WRT_DIS 0x3DFF
00639 #define WRT_EN  0x3FFF
00640 */
00641 
00642 /*
00643 ;//EEPROM PROTECT
00644 #define CPD_DIS 0x3EFF
00645 #define CPD_EN  0x3FFF
00646 */
00647 
00648 /*
00649 ;//LOW VOLTAJE PROGRAMMING
00650 #define LVP_DIS 0x3F7F
00651 #define LVP_EN  0x3FFF
00652 */
00653 
00654 /*
00655 ;//BOR
00656 #define BOR_DIS 0x3FBF
00657 #define BOR_EN  0x3FFF
00658 */
00659 
00660 /*
00661 ;//PWRTE
00662 #define PWRTE_DIS 0x3FFF
00663 #define PWRTE_EN  0x3FF7
00664 */
00665 
00666 /*
00667 ;//WATCHDOG
00668 #define WDT_DIS 0x3FFB
00669 #define WDT_EN  0x3FFF
00670 */
00671 
00672 /*
00673 ;//OSCILLATOR
00674 #define RC_OSC 0x3FFF
00675 #define HS_OSC 0x3FFE
00676 #define XT_OSC 0x3FFD
00677 #define LP_OSC 0x3FFC
00678 */
00679 
00680 
00682 //                        Definiciones del ADC                                //
00684 
00685 // frequencia de oscillador: bit5=ADCON1.ADCS2, bit6=ADCON0.ADCS0, bit7=ADCON0.ADCS1
00686 #define FOSC_DIV_2      0x00
00687 #define FOSC_DIV_4      0x20
00688 #define FOSC_DIV_8      0x40
00689 #define FOSC_DIV_16     0x60
00690 #define FOSC_DIV_32     0x80
00691 #define FOSC_DIV_64     0xA0
00692 #define FOSC_RC         0xE0
00693 
00694 // configuracion de entradas y Vref(PCFG0-3 en ADCON1)  
00695 #define A8_R0   0x00
00696 #define A7_R1   0x01
00697 #define A5_R0   0x02
00698 #define A4_R1   0x03
00699 #define A3_R0   0x04
00700 #define A2_R1   0x05
00701 #define A0_R0   0x06
00702 #define A6_R2   0x08
00703 #define A6_R0   0x09
00704 #define A5_R1   0x0a
00705 #define A4_R2   0x0b
00706 #define A3_R2   0x0c
00707 #define A2_R2   0x0d
00708 #define A1_R0   0x0e
00709 #define A1_R2   0x0f
00710 
00711 // flag de interrupciones on/off 
00712 #define INT_OFF 0x00
00713 #define INT_ON  0x01
00714 
00715 // selección de canal: usados bits 3-5 = ADCON0.CHS0-CHS2
00716 #define CHANNEL_0  0x00
00717 #define CHANNEL_1  0x08
00718 #define CHANNEL_2  0x10
00719 #define CHANNEL_3  0x18
00720 #define CHANNEL_4  0x20
00721 #define CHANNEL_5  0x28
00722 #define CHANNEL_6  0x30
00723 #define CHANNEL_7  0x38
00724 
00726 //                     Definiciones del Comparador                            //
00728 
00729 // Configuración de comparadores 
00730 
00731 #define COMP_RESET           0X00
00732 #define COMP1_OUT            0X01
00733 #define TWO_COMP             0X02
00734 #define TWO_COMP_OUT         0X03
00735 #define TWO_COMP_COMREF      0X04
00736 #define TWO_COMP_COMREF_OUT  0X05
00737 #define TWO_COMP_MULTI4_VREF 0x06
00738 #define COMP_OFF             0X07
00739 
00740 
00741 // Invertir salidas: usados bits 4-5 = CMCON.C1INV-C2INV
00742 
00743 #define NO_INV       0X00
00744 #define C1_INV       0X10
00745 #define C2_INV       0X20
00746 #define C1_C2_INV    0X30
00747 
00748 
00749 // Multiplexor: usados bits 0-3 
00750 
00751 #define RA0_RA1      0X00
00752 #define RA2_RA3      0X08
00753 
00755 //                        Definiciones del UART                               //
00757 
00758 //bit BRGH en el registro TXSTA
00759 #define TXSTA_BRGH 2
00760 
00761 
00763 //                     Definiciones del Timer0                                //
00765 
00766 // timer/counter - interno/externo
00767 
00768 #define TIMER_INTERN    0X00
00769 #define COUNTER_EXTERN  0X20
00770 
00771 
00772 // Counter en rising o falling: bit 4
00773 
00774 #define RIS_EDGE            0X00
00775 #define FAL_EDGE            0X10
00776 
00777 
00778 // Prescaler
00779 
00780 #define PRESC_DIV_2     0X00
00781 #define PRESC_DIV_4     0X01
00782 #define PRESC_DIV_8     0X02
00783 #define PRESC_DIV_16    0X03
00784 #define PRESC_DIV_32    0X04
00785 #define PRESC_DIV_64    0X05
00786 #define PRESC_DIV_128   0X06
00787 #define PRESC_DIV_256   0X07
00788 #define PRESC_OFF       0X08 // asignado a wathdog
00789 
00790 
00792 //                     Definiciones del Timer2                                //
00794 // Prescaler
00795 
00796 #define PRESC_DIV_1     0X00
00797 //#define PRESC_DIV_4     0X01
00798 //#define PRESC_DIV_16    0X03
00799 
00800 // Postscaler
00801 
00802 #define POSTSC_DIV_1     0X00
00803 #define POSTSC_DIV_2     0X08
00804 #define POSTSC_DIV_3     0X10
00805 #define POSTSC_DIV_4     0X18
00806 #define POSTSC_DIV_5     0X20
00807 #define POSTSC_DIV_6     0X28
00808 #define POSTSC_DIV_7     0X30
00809 #define POSTSC_DIV_8     0X38
00810 #define POSTSC_DIV_9     0X40
00811 #define POSTSC_DIV_10    0X48
00812 #define POSTSC_DIV_11    0X50
00813 #define POSTSC_DIV_12    0X58
00814 #define POSTSC_DIV_13    0X60
00815 #define POSTSC_DIV_14    0X68
00816 #define POSTSC_DIV_15    0X70
00817 #define POSTSC_DIV_16    0X78
00818 
00819 #endif

Generado el Thu Jan 8 00:55:37 2009 para pic-gcc-library por  doxygen 1.5.1